The Compiler Design Handbook: Optimizations and Machine Code Generation, Second Edition - ISBN:142004382X

The Compiler Design Handbook: Optimizations and Machine Code Generation, Second Edition

Date: 06 May 2011, 19:36

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Today's embedded devices and sensor networks are becoming more and more sophisticated, requiring more efficient and highly flexible compilers. Engineers are discovering that many of the compilers in use today are ill-suited to meet the demands of more advanced computer architectures.
Updated to include the latest techniques, The Compiler Design Handbook, Second Edition offers a unique opportunity for designers and researchers to update their knowledge, refine their skills, and prepare for emerging innovations. The completely revised handbook includes 14 new chapters addressing topics such as worst case execution time estimation, garbage collection, and energy aware compilation. The editors take special care to consider the growing proliferation of embedded devices, as well as the need for efficient techniques to debug faulty code. New contributors provide additional insight to chapters on register allocation, software pipelining, instruction scheduling, and type systems.
Written bytop researchers and designers from around the world, The Compiler Design Handbook, Second Edition gives designers the opportunity to incorporate and develop innovative techniques for optimization and code generation.
Table of Contents
1 Worst-Case Execution Time and Energy Analysis
2 Static Program Analysis for Security
3 Compiler-Aided Design of Embedded Computers
4 Whole Execution Traces and Their Use in Debugging
5 Optimizations for Memory Hierarchies
6 Garbage Collection Techniques
7 Energy-Aware Compiler Optimizations
8 Statistical and Machine Learning Techniques in Compiler Design
9 Type Systems: Advances and Applications
10 Dynamic Compilation
11 The Static Single Assignment Form: Construction and Application to Program Optimization
12 Shape Analysis and Applications
13 Optimizations for Object-Oriented Languages
14 Program Slicing
15 Computations on Iteration Spaces
16 Architecture Description Languages for Retargetable Compilation
17 Instruction Selection Using Tree Parsing
18 A Retargetable Very Long InstructionWord Compiler Framework for Digital Signal Processors
19 Instruction Scheduling
20 Advances in Software Pipelining
21 Advances in Register Allocation Techniques
Index
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