Modern Circuit Placement: Best Practices and Results (Series on Integrated Circuits and Systems) - ISBN:038736837X

Modern Circuit Placement: Best Practices and Results (Series on Integrated Circuits and Systems)

Date: 06 May 2011, 19:57

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Modern Circuit Placement: Best Practices and Results describes advanced techniques in VLSI circuit placement which is one of the most important steps of the VLSI physical design flow. Physical design addresses the back-end layout stage of the chip design process. As technology scales down, the significance of interconnect optimization becomes much more important and physical design, particularly the placement process, is essential to interconnect optimization.
This book has four unique characteristics. First, it focuses on the most recent highly scalable placement techniques used for multi-million gate circuit designs, with consideration of many practical aspects of modern circuit placement, such as density and routability control, mixed-size placement support, and area I/O support. Second the book addresses dominant techniques being used in the field. This book includes all the academic placement tools that competed at the International Symposium on Physical Design (ISPD) placement contest in 2005 and 2006. Although these tools are developed by academia, many core techniques in these tools are being used extensively in industry and represent todays advanced placement techniques. Third, the book provides quantitative comparison among the various techniques on common benchmark circuits derived from real-life industrial designs. The book includes significant amounts of analysis on each technique, such as trade-offs between quality-of-results (QoR) and runtime. Finally, analysis of the optimality of the placement techniques is included. This is done by utilizing placement benchmarks with known optimal solutions, yet with characteristics similar to real industrial designs.
Modern Circuit Placement: Best Practices and Results is a valuable tool and a must-read for graduate students, researchers and CAD tool developers in the VLSI physical synthesis and physical design fields.
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