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Microprocessor Programming and Applications for Scientists and Engineers
Microprocessor Programming and Applications for Scientists and Engineers
Date: 30 April 2011, 05:41

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CONTENTS
CHAPTER 1 . COMPUTER ORGANIZATION
1.1 Bits. Bytes and Nibbles
1.2 Instructions
1.3 Locations in Memory
1.4 Locations of 1/0 Devices
1.5 Data
1.6 Programming Languages
1.7 AIM 65 Computer
CHAPTER 2 . NUMBER SYSTEMS/CODE CONVERSIONS
NUMBER SYSTEMS
2.1 Decimal Numbers
2.2 Binary Numbers
2.3 Octal and Hexadecimal Numbers
2.4 Fractional Numbers
2.5 BCD Numbers
2.6 Binary-to-Decimal
2.7 Decimal-to-Binary
2.8 Binary Addition
2.9 Binary Subtraction
2.10 Signed Binary Numbers
2.11 Binary Multiplication
2.12 Binary Division
2.13 Register Shifts
CODE CONVERSIONS
2.14 Lookup Tables
2.15 Number Base Conversion
2.16 Hardware Devices
CHAPTER 3 . LOGIC GATES
3.1 Inverter (NOT) Gate
3.2 AND Gate
3.3 OR Gate
3.4 NAND Gate
3.5 NOR Gate
3.6 XOR Gate
3.7 Diode AND Function
3.8 Diode OR Function
3.9 Transistor Inverter
3.10 Equivalent Gates
3.11 Inverted Inputs. Outputs
3.12 Summary Table
3.13 Flip-Flops
3.14 Decoders
3.15 Multiplexers
3.16 Open-Collector Logic
3.17 Tri-State Logic
3.18 MOS and CMOS Devices
CHAPTER 4 . THE 6502 MPU
4.1 Architecture
4.2 Execution
4.2 Mnemonics
4.3 Registers
4.4 Paging
4.5 Instructions and Addressing Modes
LDA. STA Instructions
LDX. LDY. STX. STY Instructions
TAX. TAY. TXA. TYA Instructions
BRK. NOP Instructions
JMP Instruction
INC. DEC Instructions
Instruction Mnemonic Entry Mode
AND. ORA. EOR Instructions
CLC. SEC. CLD. SED Instructions
ADC. SBC. CLV Instructions
Branch Instructions
Compare Instructions
Programmed Time Delays
BIT Instruction
ASL. LSR. ROL. ROR Instructions
Indexed Addressing
Sorting
Indirect Addressing
Subroutines. JSR/RTS Instructions
The Stack
Push. Pull. Transfer Instructions
Interrupts. IRQ/NMI/BRK/RES
RTI. SEI. CLI Instructions
CHAPTER 5 . THE 6522 VIA
5.1 Input/Output
5.2 Timing
5.3 Shifting
5.4 Function Control
Auxiliary Control Register (ACR)
Peripheral Control Register (PCR)
5.5 Interrupt Control
Interrupt Registers (IFR. IER)
Effects of Read/Write Operations
CHAPTER 6 . MONITOR ROUTINES
CHAPTER 7 . DATA ACQUISITION
7.1 Sensors
7.2 Signal Conditioners
7.3 Digital-> Analog. Analog-> Digital Conversions
7.4 Hardware A/D Converters
7.5 Other A/D Conversion Schemes
7.6 Beyond 8-Bits
7.7 Sample-and-Hold Circuits
CHAPTER 8 . CONTROL
8.1 Solid State Relays
8.2 Stepper Motors
8.3 Programmable-Gain Amplifiers
8.4 Thyristors (SCR's and Triacs)
8.5 Power MOSFET'S
CHAPTER 9 . DATA COMMUNICATION INTERFACES
9.1 Centronics Parallel Interface
9.2 RS-232C Serial Interface
9.3 IEEE-488 Parallel Interface
9.4 Backplane Busses
CHAPTER 10 . PROGRAM DEVELOPMENT
10.1 Assemblers
10.2 The FORTH Language
10.3 Structured Programming
10.4 Flowcharts
10.5 Development Systems
SELECTED REFERENCES
APPENDIX A: REFERENCE INFORMATION
R650X, R651X Microprocessors
R6522 Versatile Interface Adapter
AIM 65 Microcomputer
APPENDIX B: 6502 INSTRUCTIONS
Descriptions
Addressing Modes
Internal Registers
Mnemonics/Op-Codes
Execution Times
INDEX

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