Deep Submicron CMOS Circuit Design: Simulator In Hands - ISBN:0000000000

Deep Submicron CMOS Circuit Design: Simulator In Hands

Date: 15 April 2011, 17:34

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Preface
The present book introduces the design and simulation of CMOS integrated circuits
The chapters of this book have been summarized below. Chapter One describes the technology scale down and the
major improvements allowed by deep sub-micron technologies. Chapter Two is dedicated to the presentation of the
single MOS device, with details on simulation at logic and layout levels. The modeling of the MOS devices is
introduced in Chapter Three. Chapter Four presents the CMOS Inverter, the 2D and 3D views, the comparative design
in micron and deep-submicron technologies. Chapter Five deals specifically with interconnects, with information on
the propagation delay and several parasitic effects. Chapter Six deals with the basic logic gates (AND, OR, XOR,
complex gates), Chapter Seven the arithmetic functions (Adder, comparator, multiplier, ALU). The latches and
counters are detailed in Chapter Eight, while Chapter Nine introduces the basic concepts of Field programmable Gate
Arrays.
As for Chapter Ten, static, dynamic, non-volatile and magnetic memories are described. In Chapter Eleven, analog
cells are presented, including voltage references, current mirrors, and the basic architecture of operational amplifiers.
Chapter Twelve is dedicated to radio-frequency analog cells, with details on mixers, voltage-controlled oscillators, fast
phase-lock-loops and power amplifiers. Chapter Thirteen focuses on analog-to-digital and digital to analog converter
principles. The input/output interfacing principles are illustrated in Chapter Fourteen. The last chapter includes an
introduction to silicon-insulator technology, before a prospective and a conclusion.
The detailed explanation of the design rules is in appendix A. The details of all commands are given in appendix B for
the tool Microwind, and in appendix C for the tool Dsch. Appendix D includes a quick reference sheet for Microwind
and Dsch, and Appendix E gives some abstract information about each technology generation, from 0.7µm down to
90nm.
Sonia DELMAS-BENDHIA, Etienne SICARD

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